setRegisters
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parent
7300bbf361
commit
8dcb41a838
7
util.py
7
util.py
@ -70,9 +70,8 @@ class Stack:
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return addr
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def genSyscall(elf, syscall, registers):
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def setRegisters(elf, registers):
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rop = ROP(elf)
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registers["rax"] = syscall
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for t in rop.setRegisters(registers):
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value = t[0]
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gadget = t[1]
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@ -83,7 +82,11 @@ def genSyscall(elf, syscall, registers):
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rop.raw(registers[reg])
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else:
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rop.raw(0)
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return rop
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def genSyscall(elf, syscall, registers):
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registers["rax"] = syscall
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rop = setRegisters(elf, registers)
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syscall_gadget = "syscall" if elf.arch == "amd64" else "int 0x80"
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rop.raw(rop.find_gadget([syscall_gadget]).address)
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return rop
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